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Audio Codec IC

GC1219 - Low Power Smart Codec IC


The GC1219 device has combined Goodix’s high-fidelity, high-efficiency hardware audio codec with integrated high performance DSP. The GC1219 sets a new benchmark for its flexibility, ease-of-use, performance, and energy efficiency.

The GC1219 has integrated 2 stereo (4 inputs) Analog-to-Digital Converters (ADCs) and a stereo Digital-to-Analog Converter (DAC) with a capless headphone driver. This chip is an ideal smart codec for a number of  battery-powered wireless audio applications, like Bluetooth True Wireless Stereo (TWS) headset, Bluetooth stereo headset, and voice trigger applications.


  • High Processing Capacity

    1. Integrated high performance DSP for computing intensive programs
    2. Reference code includes AAC/MP3/SBC decoding and mSBC/CVSD/LC3 encoding/decoding
  • Low Power Features

    1. Multiple power domains and modes support users to shut down DSP or audio codec blocks for maximum power saving
    2. Configurable retention or shutdown mode on each memory instance
    3. Deep sleep mode with external wakeup pins
    4. Standby mode with code and state retention at minimum power
  • Audio Codec

    1. Up to 96 ksps/24 bit Stereo PCM playback, and up to 48 ksps/24-bit 8-channel PCM recording
    2. PEQ
    3. Hybrid ANC support
    4. Up to 4 x AMIC + 4 x DMIC (PDM) input
  • Serial Audio Interface

    1. Supports standard I2S/Left-justified mode up to 2-ch TX (downlink) + 2-ch RX (uplink), in 16, 24 and 32 bit format
    2. Supports TDM mode up to 2-ch TX (downlink) + 8-ch RX (uplink), in 16, 24 and 32 bit format
  • VPU Interface

  • Clock and Reset

    1. Embedded 16 MHz XTAL OSC
    2. Fractional-N Audio PLL with 1 PPM fine-tune in ±16 kHz range
    3. Integer-N General Purpose PLL (VCO 10 MHz to 130 MHz configurable)
    4. External reference clock input (2 MHz typical)
    5. 24 MHz RC OSC for always-listening
    6. WWDT/32 kHz RC OSC for sleep mode
  • Power Supply

    1. 1.8 V external main power supply
    2. 0.9 V to 1.1 V digital core supply

System Block Diagram

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