Stock Code: 603160

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Audio Amplifier

TFA9882UK: 3.4 W I²S Input Mono Class-D Audio Amplifier

Overview

The TFA9882 is a mono, filter-free Class-D audio amplifier in a 9-bump WLCSP (Wafer Level Chip-Size Package) with a 400 µm pitch.

It receives audio and control settings via an I²S digital interface. The Power-down to Operating mode transition is triggered when a clock signal is detected on the bit clock input (BCK). Two devices can be combined to build a stereo application.

In stereo applications, the left or right I²S audio stream is selected by connecting the word select signal to, respectively, pin WSL or pin WSR. Mono mixing can be achieved by connecting the word select signal to both WSL and WSR. Switching off the word select signal selects Mute mode.

The device features low RF susceptibility because it has a digital input interface that is insensitive to clock jitter. The second order closed loop architecture used in the TFA9882 provides excellent audio performance and high supply voltage ripple rejection.

Features

  • Small outline WLCSP9 package: 1.27 × 1.49 × 0.6 mm

  • Wide supply voltage range (fully operational from 2.5 V to 5.5 V)

  • High efficiency (90 %, 4 Ω/20 μH load) and low power dissipation

  • Quiescent power:

    1. 6.5 mW (VDDD = 1.8 V, VDDP = 3.6 V, 4 Ω/20 μH load, fs= 32 kHz)
    2. 7.65 mW (VDDD = 1.8 V, VDDP = 3.6 V, 4 Ω/20 μH load, fs = 48 kHz)
  • Output power:

    1. 1.4 W into 4 Ω at 3.6 V supply (THD = 1 %)
    2. 2.7 W into 4 Ω at 5.0 V supply (THD = 1 %)
    3. 3.4 W into 4 Ω at 5.0 V supply (THD = 10 %)
  • Output noise voltage: 24 μV (A-weighted)

  • Signal-to-noise ratio: 103 dB (VDDP = 5 V, A-weighted)

  • Fully short-circuit proof across load and to supply lines

  • Current limiting to avoid audio holes

  • Thermally protected

  • Undervoltage and overvoltage protection

  • High-pass filter for DC blocking

  • Simplified interface for audio and control settings

  • Left/right selection and mono mixing

  • Three gain settings: -3 dB, 0 dB and +3 dB

  • Output slope setting for EMI reduction

  • Clip control for smooth clipping

  • Mute mode

  • Low RF susceptibility

  • Insensitive to input clock jitter

  • ‘Pop noise’ free at all mode transitions

  • Short power-up time: 4 ms

  • Short power-down time: 5 μs

  • 1.8 V/3.3 V tolerant digital inputs

  • Only two external components required

System Block Diagram

Application Block Diagram

FAQ

Title

ID

Version

Date

  • TFA9882_DS_Rev.4.1 DS-VAA-00031-EN Rev.4.1 2020-02-21 PDF

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